1. Field of the Invention
The present invention relates to the protection of an integrated circuit against electrostatic discharges and other overvoltages. The present invention more specifically relates to the integration of the circuits necessary to such protection.
2. Discussion of the Related Art
Circuits of protection against electrostatic discharges (ESD) aim at protecting an electronic circuit against electrostatic discharges that come from its terminals.
FIG. 1 schematically illustrates a conventional example of an electronic protection circuit 1. The function of this circuit especially is to short-circuit supply lines 2, 3 of the integrated circuit when an overvoltage due to an electrostatic discharge applied on a pad 4 of the circuit occurs. This pad is intended to connect the core of the integrated circuit (not shown) to the outside. Protection circuit 1 includes two diodes D1, D2 in series connecting supply lines 2 and 3. Midpoint 5 of this series connection is electrically connected to pad 4. The biasing of diodes D1 and D2 is such that, in normal operation, they are off. Accordingly, in the example of FIG. 1, line 2 forms the most positive supply line while line 3 forms the most negative supply line (generally, the ground). Circuit 1 also includes a MOS transistor MOSSWI interconnecting supply lines 2 and 3 and having its gate connected to at least one ESD protection control circuit 6.
Disturbances of electrostatic type likely to be received by pads 4 may be formed of positive or negative charges. When such charges appear, one of diodes D1 or D2 becomes conductive. Transistor MOSSWI must then be turned on to short-circuit supply lines 2 and 3 and thus conduct away the excess charges. By passing the charges through transistor MOSSWI, it is avoided for them to damage the core. To ensure that the electric path formed by diode D1 or D2 is less resistive than the passing through the circuit core, a resistor 7 is provided between each pad 4 and the integrated circuit core.
Circuit 6 (CT) thus sets a time constant (xcfx84) of triggering of transistor MOSSWI upon occurrence of an electrostatic discharge, that is, of a current flowing through one of diodes D1 or D2. Circuit 6 is generally formed of a resistive and capacitive circuit (RC cell).
Transistors MOSSWI for short-circuiting the supply conductors may also be used as a protection against possible overvoltages with respect to the maximum value admissible by the integrated circuit technology. In this case, an additional control circuit 8 (OVT) has the function of detecting possible overvoltages (for example, with respect to a predetermined voltage threshold Vref) and of turning on the transistor MOSSWI to which the circuit is associated. The integrated circuit is thus not only protected against electrostatic discharges but also against any overvoltage, whatever its origin.
Reference will be made hereafter to electronic protection circuits to encompass the protection against electrostatic discharges (ESD) and, unless otherwise mentioned, the protection against other overvoltages.
Among the features to be respected by an electronic protection circuit 1, one should note:
the fact that transistor MOSSWI must exhibit the smallest possible on-state resistance (RdsON) to properly fill its protection function and avoid for the overvoltage to propagate to the rest of the circuit. As a result, transistor MOSSWI (generally, an N-channel MOS transistor) has a significant size to be able to rapidly conduct the excess charges.
Control circuit 6 intended to detect the overvoltages must generally have a low time constant (most often smaller than 200 ns).
The foregoing results in that it is generally desired to place the transistor MOSSWI of a protection circuit as close as possible to the pad or to pads 4 that it is supposed to protect. This, to minimize the resistance brought by the actual supply lines and by the sections present between the pads and the transistor terminals.
Further, the control circuit(s) themselves must conventionally be placed as close as possible to transistor MOSSWI, here again, to minimize the resistance due to the conductive path between these circuits and the gate of transistor MOSSWI generally forming the capacitive element of control circuit 6.
FIG. 2 illustrates, in a very simplified partial top view, a conventional example of implementation of an integrated circuit 10 having pads 4 associated with ESD protection circuits. In the example of FIG. 2, three pads 4 (PAD) and two ESD protection circuits 1 have been illustrated. For the proximity reasons discussed hereabove, protection circuits 1 are generally placed in what is called a crown of the integrated circuit. This crown surrounds the circuit core integrating the different functions linked to the specific application of the integrated circuit.
The crown of circuit 10 generally includes what is called a supply rail 11 (BUS) which includes at least two conductors 12, 13 conveying respectively more positive and more negative supply voltages VP and VN of the integrated circuit. If necessary, supply rail 11 may include other conductors, for example, if the integrated circuit has a positive supply voltage, a ground and a negative supply voltage.
The supply bus may be only partial at the periphery or be arranged differently in the integrated circuit (for example, at the center). The notion of core encompasses, whatever its position, the integrated elements performing the different functions linked to the application specific to the integrated circuit and supplied by a bus having any form.
Each transistor MOSSWI of a circuit 1 is connected, respectively by a conductor 14, 15, to conductor 12, 13 of the supply bus. Similarly, each pad 4 is connected to conductors 12 and 13 via diodes (D1, D2, FIG. 1), not shown in FIG. 2.
From the point of view of the connection pads, two large integrated circuit families can generally be distinguished.
A first family includes circuits generally designated as xe2x80x9cpad limitedxe2x80x9d circuits. It gathers the integrated circuits in which the high number of connection pads to the outside from the integrated circuit core conditions the size of the actual integrated circuit due to the perimeter required to align all pads.
A second circuit family includes circuits generally designated as xe2x80x9ccore limitedxe2x80x9d circuits, the size of which is limited by the core surface area and not by the perimeter required to align the pads.
In the circuits of the first family, all the room necessary to form, in sufficient numbers, MOSSWI transistors and their control circuits to correctly protect the integrated circuit against electrostatic discharges is available in the integrated circuit core.
However, in circuits having their size already determined by the integrated circuit core, it is prejudicial to the general circuit bulk to have to increase this size of the core to form the MOSSWI transistors of the ESD protection circuits. Typically, the protection circuits may amount to up to 10% of the chip core size, which adversely affects the generally desired miniaturization.
The present invention aims at providing an integrated circuit with an electronic protection element of reduced bulk.
The present invention more specifically aims at reducing the general bulk of an integrated circuit of core limited type equipped with electronic protection elements.
The present invention also aims at providing a solution which does not adversely affect the quality of the ESD protection or which even improves it.
The present invention also aims at providing a solution which enables protecting the integrated circuit against any type of overvoltage.
The present invention further aims at providing a solution which is compatible with current integrated circuit manufacturing techniques.
To achieve these and other objects, the present invention provides an integrated circuit including at least one element of electronic protection of said circuit formed of at least one switch for short-circuiting supply conductors arranged in a rail, said switch being integrated in said rail, under said conductors.
According to an embodiment of the present invention, several switches are controlled by at least one first common circuit.
According to an embodiment of the present invention, said first circuit detects the occurrence of electrostatic charges.
According to an embodiment of the present invention, the circuit further includes at least one second control circuit detecting the occurrence of overvoltages between said supply conductors.
According to an embodiment of the present invention, the control circuit(s) of the short-circuit switches are located in a core of the integrated circuit.
According to an embodiment of the present invention, the switches are formed of MOS transistors having their respective drains and sources connected to one of two supply conductors of the integrated circuit.
According to an embodiment of the present invention, an additional conductor for controlling the gates of the MOS transistors is provided in the supply rail.
The present invention also provides a method for integrating switches for short-circuiting supply conductors arranged in a rail, comprising forming the switches in the form of MOS transistors under the rail supply conductors.
The foregoing objects, features and advantages of the present invention will be discussed in detail in the following non-limiting description of specific embodiments in connection with the accompanying drawings.